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| HT1632C 32 8&24 16 led driver block diagram rev. 1.20 1 june 28, 2011 general description the HT1632C is a memory mapping led display control - ler/driver, which can select a number of row and com - mons. these are 32 row & 8 commons and 24 row & 16 commons. the device supports 16-gradation leds for each out line using pwm control with software instruc- tions. a serial interface is conveniently provided for the command mode and data mode. only three or four lines are required for the interface between the host controller and the HT1632C. the display can be extended by cas - cading the HT1632C for wider applications. features operating voltage: 2.4v~5.5v multiple led display 32 row /8 com and 24 row & 16 com integrated display ram select 32 row & 8 com for 64 4 display ram, or select 24 row & 16 com for 96 4 display ram 16-level pwm brightness control integrated 256khz rc oscillator serial mcu interface cs ,rd ,wr , data data mode & command mode instruction cascading function for extended applications selectable nmos open drain output driver and pmos open drain output driver for commons 52-pin qfp package ! ! " ! # ! " ! $ % ! $ & ' ! ( ) ! % ( ' ! * + , - + $ $ applications industrial control indicator digital clock, thermometer, counter, voltmeter instrumentation readouts other consumer application led displays pin assignment pin description pad name i/o description row0~row23 o line drivers. these pins drive the leds. row24/com15~ row31/com8 o drive led outputs or common outputs. each com pin is double bonded. com0~com7 o common outputs. each com pin is double bonded. sync i/o if the rc master mode or ext clk master mode command is programmed, the synchro- nous signal is output to syn pin. if the slave mode command is programmed, the synchronous signal is input from syn pin. osc i/o if the rc master mode command is programmed, the system clock source is from on-chip rc oscillator and system clock is output to osc pin. if the slave mode or ext clk master mode command is programmed, the system clock source is input from external clock via the osc pin. data i/o serial data input or output with pull-high resistor wr i write clock input with pull-high resistor data on the data lines are latched into the HT1632C on the rising edge of the wr signal. rd i read clock input with pull-high resistor. the HT1632C ram data is clocked out on the falling edge of the rd signal. the clocked out data will appear on the data line. the host controller can use the next rising edge to latch the clocked out data. cs i chip select input with pull-high resistor when the cs line is high, the data and command read from or written to the HT1632C is disabled, and the serial interface circuit is also re - set. if cs is low, the data and command transmission between the host controller and the HT1632C are all enabled. led_vdd positive power supply for driver circuit. each led_vdd pin is double bonded. led_vss negative power supply for driver circuit, ground. each led_vss pin is double bonded. vss negative power supply for logic circuit, ground. vdd positive power supply for logic circuit. HT1632C rev. 1.20 2 june 28, 2011 ( $ % & ) . # * / ( " ( ( ( $ ( % ( & ( ) ( . ( # ( * ( / $ " $ ( $ $ % & % ) % . % # % * % / & *& /) ") () $ $ % $ & $ ) $ . $ # $ * $ / % " % ( % $ % % & "& (& $& %& & & )& .& # ! ( ( ! ( " ! / ! * ! # ! . + ! ) ! & ! % ! $ ! ( ! " ! $ ) ' ! ( & + ! $ . ' ! ( % + ! $ # ' ! ( $ ! $ * ' ! ( ( ! $ / ' ! ( " ! % " ' ! / ! % ( ' ! * ! # ! . ! ) ! & ! $ & ' ! ( ) ! $ % ! $ $ ! $ ( ! $ " ! ( / ! ( * ! ( # ! ( . ! ( ) ! ( & ! ( % ! ( $ ! % + ! $ ! ( ! " , - ! absolute maximum ratings supply voltage ...........................v ss 0.3v to v ss +6.0v storage temperature ............................ 50 cto125 c input voltage.............................v ss 0.3v to v dd +0.3v operating temperature........................... 40 cto85 c note: these are stress ratings only. stresses exceeding the range specified under absolute maximum ratings may cause substantial damage to the device. functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. d.c. characteristics v dd =2.4v~5.5v, ta=25 c (unless otherwise specified) symbol parameter test conditions min. typ. max. unit v dd conditions v dd operating voltage 2.4 5.0 5.5 v i dd operating current 5v no load, led on, on-chip rc oscillator 0.3 0.6 ma i stb standby current 5v no load, power down mode 1.5 3.0 a v il input low voltage 5v data, wr ,cs ,rd 0 0.3v dd v v ih input high voltage 5v data, wr ,cs ,rd 0.7v dd 5v i ol1 osc, sync, data 5v v ol =0.5v 18 25 ma i oh1 osc, sync, data 5v v oh =4.5v -10 -13 ma i ol2 row sink current 5v v ol =0.5v 12 16 ma i oh2 row source current 5v v oh =4.5v -50 -70 ma i ol3 com sink current 5v v ol =0.5v 250 350 ma i oh3 com source current 5v v oh =4.5v -45 -60 ma r ph pull-high resistor 5v data, wr ,cs ,rd 18 27 40 k HT1632C rev. 1.20 3 june 28, 2011 a.c. characteristics v dd =2.4v~5.5v, ta=25 c (unless otherwise specified) symbol parameter test conditions min. typ. max. unit v dd conditions f sys system clock 5v on-chip rc oscillator 230 256 282 khz f led led duty cycle & frame frequency 5v 1/8 duty f sys /2624 hz 5v 1/16 duty f sys /2624 hz f clk1 serial data clock (wr pin) 5v duty cycle 50% 1 mhz f clk2 serial data clock (rd pin) 5v duty cycle 50% 500 khz t cs serial interface reset pulse width cs 250 ns t clk wr ,rd input pulse width 5v write mode 0.5 s read mode 1.0 t r ,t f rise/fall time serial data clock width (figure 1) 50 100 ns t su setup time for data to wr , rd clock width (figure 2) 50 100 ns t h hold time for data to wr ,rd , clock width (figure 2) 100 200 ns t su1 setup time for cs to wr ,rd , clock width (figure 3) 200 300 ns t h1 hold time for cs to wr ,rd , clock width (figure 3) 100 200 ns t od data output delay time (figure 4) 100 200 ns HT1632C rev. 1.20 4 june 28, 2011 / " 0 ) " 0 ( " 0 - 1 2 3 4 4 figure 1 ) " 0 ) " 0 2 - 5 - figure 2 - ) " 0 ) " 0 6 2 2 - 1 2 ( 5 ( figure 3 ) " 0 - - figure 4 HT1632C rev. 1.20 5 june 28, 2011 functional description display memory ram the static display memory (ram) is organized into 64 4 bits or 96 4 bits and is used to store the display data. if 32 row & 8 com is selected, the ram size is 64 4 bits. if 24 row & 16 com is selected, the ram size is 96 4 bits. the contents of the ram are directly mapped to the contents of the led driver. if the data in ram is set to 1 , the corresponding led will be lighted. data in the ram can be accessed by the read, write, and read-modify-write commands. the contents of the ram can be read or written from bit 0 of the specific address. the following is a mapping from the ram to the led pattern: com7 com6 com5 com4 com3 com2 com1 com0 row0 01h 00h row1 03h 02h row2 05h 04h row3 07h 06h row4 09h 08h row5 0bh 0ah row6 0dh 0ch row7 0fh 0eh row8 11h 10h row9 13h 12h row10 15h 14h row11 17h 16h row12 19h 18h row13 1bh 1ah row14 1dh 1ch row15 1fh 1eh row16 21h 20h row17 23h 22h row18 25h 24h row19 27h 26h row20 29h 28h row21 2bh 2ah row22 2dh 2ch row23 2fh 2eh row24 31h 30h row25 33h 32h row26 35h 34h row27 37h 36h row28 39h 38h row29 3bh 3ah row30 3dh 3ch row31 3fh 3eh d3 d2 d1 d0 addr. data d3 d2 d1 d0 addr. data 32 row & 8 com for 64 4 display ram HT1632C rev. 1.20 6 june 28, 2011 com15 com14 com13 com12 ......... com3 com2 com1 com0 row0 03h ......... 00h row1 07h 04h row2 0bh 08h row3 0fh 0ch row4 13h 10h row5 17h 14h row6 1bh 18h row7 1fh 1ch row8 23h 20h row9 27h 24h row10 2bh 28h row11 2fh 2ch row12 33h 30h row13 37h 34h row14 3bh 38h row15 3fh 3ch row16 43h 40h row17 47h 44h row18 4bh 48h row19 4fh 4ch row20 53h 50h row21 57h 54h row22 5bh 58h row23 5fh ......... 5ch d3 d2 d1 d0 addr. data d3 d2 d1 d0 addr. data 24 row & 16 com for 96 4 display ram HT1632C rev. 1.20 7 june 28, 2011 system oscillator the HT1632C system clock is used to generate the time base clock frequency, led-driving clock. the clock may be sourced from an on-chip rc oscillator (256khz), or an external clock using the s/w setting. the configura - tion of the system oscillator is as shown. after the sys dis command is executed, the system clock will stop and the led duty cycle generator will turn off. this com - mand is, however, available only for the on-chip rc os - cillator. once the system clock stops, the led display will become blank, and the time base will also lose its function. the led off command is used to turn the led duty cycle generator off. after the led duty cycle generator switches off by issuing the led off com - mand, using the sys dis command reduces power consumption, serving as a system power down com - mand. but if the external clock source is chosen as the system clock, using the sys dis command can neither turn the oscillator off nor execute the power down mode. the crystal oscillator option can be applied to connect an external frequency source to the osc pin. in this case, the system fails to enter the power down mode, similar to the case in the external clock source opera - tion. at the initial system power on, the HT1632C is in the sys dis state. led driver the HT1632C has a 256 (32 8) and 384 (24 16) pattern led driver. it can be configured in a 32 8or24 16 pat - tern and common pad n-mos open drain output or p-mos open drain output led driver using the s/w con - figuration. this feature makes the HT1632C suitable for multiple led applications. the led-driving clock is de - rived from the system clock. the driving clock frequency is always 256khz, an on-chip rc oscillator frequency, or an external frequency. the led corresponding com - mands are summarized in the table. the bold form of 1 0 0, namel y100, indicates the command mode id. if suc - cessive commands have been issued, the command mode id except for the first command will be omitted. the led off command turns the led display off by dis - abling the led duty cycle generator. the led on com - mand, on the other hand, turns the led display on by enabling the led duty cycle generator. name command code function led off 100 00000010x turn off led outputs led on 100 00000011x turn on led outputs commons option 1000010abxxx ab=00: n-mos open drain output and 8 com - mon option ab=01: n-mos open drain output and 16 common option ab=10: p-mos open drain output and 8 com - mon option ab=11: p-mos open drain output and 16 common option cascade operation for the cascade operation, the first ic is set to master mode and its sync and osc pins are set to output pins. the second ic is set to slave mode and its sync and osc pins are set to input pins which are connected to the the master ic. please refer to the cascade control flow chart for detail settings. blinker the HT1632C has display blinking capabilities. the blink function generates all led blinking. the blink rates is 0.25s led on and 0.25s led off for one blinking period . this blinking function can be effectively performed by setting the blink on or blink off command. command format the s/w setting can configure the HT1632C. there are two mode commands to configure the HT1632C re - sources and to transfer the led display data. the config - uration mode of the HT1632C is knows as the command mode,with a command mode id o f100.the command mode consists of a system configuration command, a system frequency selection command, a led configura - tion command, and an operating command. the data mode, on the other hand, includes read, write, and read-modify-write operations. 7 2 ! 8 5 ! $ ) . 2 9 : ! 2 system oscillator configuration ! ! 3 3 " ; $ ) " ; $ ) < 2 ! < 2 ! 3 3 example of waveform for blinker HT1632C rev. 1.20 8 june 28, 2011 led driver mode output waveform n-mos open drain of 32x8 driver mode note: t clk =1/f sys p-mos open drain of 24x16 driver mode: (com pin with transistor buffer) note: t clk =1/f sys ~ ro w0 ~ro w 31 co m0 co m1 co m2 co m5 co m6 co m7 ~ 1frame=8*328*tclk 320*tclk 32 4*t clk 4* t clk 8*tclk sync 1/2*tclk on off off on off on off on off on off on off on ~ ro w0 ~ro w 23 co m0 co m1 co m2 row26/com13 row25/com14 row24/com15 ~ 1 f rame = 1 6*1 64* tc lk 160*tclk 16 2*t clk 2* t clk 4*tclk sync 1/2*tclk on off on off on off on off on off on off on off HT1632C rev. 1.20 9 june 28, 2011 digital dimming the display dimming capabilities of the ht1632 are very versatile. the whole display can be dimmed using pulse width modulation techniques for the row driver with the dimming command. the relationship between row and com digital dimming duty time are shown as below: note: (1) t=20 x t clk (32x8 driver mode) (2) t=10 x t clk (24x16 driver mode) (3) t clk =1/f sys 1*t 2*t 3*t 4*t 5*t 6*t 7*t 8*t 9*t 10*t 11*t 12*t 13*t 14*t 15*t 16*t com row 1/16 duty row 2/16 duty row 3/16 duty row 4/16 duty row 5/16 duty row 6/16 duty row 7/16 duty row 8/16 duty row 9/16 duty row 10/16 duty row 11/16 duty row 12/16 duty row 13/16 duty row 14/16 duty row 15/16 duty row 16/16 duty off on on off on off on off on off on off on off on off on off on off on off on off on off on off on off on off on off timing diagrams read mode command cod e=110 read mode successive address reading HT1632C rev. 1.20 10 june 28, 2011 the following are the data mode id and the command mode id: operation mode id read data 1 1 0 write data 1 0 1 read-modify-write data 1 0 1 command command 1 0 0 the mode command should be issued before the data or command is transferred. if successive commands have been issued, the command mode id, namely 1 0 0, can be omitted. while the system is operating in the non-successive command or the non-successive ad - dress data mode, the cs pin should be set to 1 and the previous operation mode will be reset also. once the cs pin returns to 0 , a new operation mode id should be is - sued first. interfacing only four lines are required to interface to the HT1632C. the cs line is used to initialise the serial interface circuit and to terminate the communication between the host controller and the HT1632C. if the cs pin is set to 1, the data and command issued between the host controller and the HT1632C are first disabled and then initialised. before issuing a mode command or mode switching, a high level pulse is required to initialise the serial inter - face of the HT1632C. the data line is the serial data in - put/output line. data to be read or written or commands to be written have to be passed through the data line. the rd line is the read clock input. data in the ram is clocked out on the falling edge of the rd signal, and the clocked out data will then appear on the data line. it is recommended that the host controller reads in the cor - rect data during the interval between the rising edge and the next falling edge of the rd signal. the wr line is the write clock input. the data, address, and command on the data line are all clocked into the ht1632 on the rising edge of the wr signal. " ( $ % ( = ( > = $ > ( ( " ) & % $ ( ( ( " ) & % $ ( " = ( > $ = $ > " ( $ % . " . ( ( " ) & % $ ( " = > " ( $ % = > " ( $ % " ( $ % " ( $ % " = ? ( > = ? $ > = ? % > . write mode command cod e=101 write mode successive address writing read-modify-write mode command cod e=101 read-modify-write mode successive address accessing HT1632C rev. 1.20 11 june 28, 2011 ) & % $ ( " " ( $ % = > = > " ( $ % " ( $ % " ( $ % " = ? ( > = ? $ > = ? % > ( " ( . ) & % $ ( " " ( $ % ( = ( > = ( > ( " ( ( " ( $ = $ > ) & % $ ( " " ( $ % = $ > . . ) & % $ ( " " ( $ % ( = ( > = ( > ) & % $ ( " " ( $ % $ = $ > = $ > ( " ( ( " ( " ( $ % = ( > . . ) & % $ ( " " ( $ % = > = > " ( $ % " ( $ % " ( $ % " = > = ? ( > = ? ( > ( " ( ( $ % " = ? $ > . command mode command cod e=100 mode data and command mode HT1632C rev. 1.20 12 june 28, 2011 ( " " * # . ) & % $ ( " ( * # . ) & % $ ( " ; ; ; application circuits low power led application (direct drive) 32 row 8 com example note: values of the r resistors are selected depending on the power consumption of the leds. 24 row 16 com example note: values of the r resistors are selected depending on the power consumption of the leds. HT1632C rev. 1.20 13 june 28, 2011 ! " @ ! % ( ! ! " @ ! # ! " ! ( ! $ ! $ / ! % " ! % ( ! " @ ! $ % ! ! " @ ! ( ) ! " ! ( ! $ ! $ ( ! $ $ ! $ % middle power led application (com with transistor buffer) 32 row 8 com example note: values of the r resistors are selected depending on the power consumption of the leds. 24 row 16 com example note: values of the r resistors are selected depending on the power consumption of the leds. HT1632C rev. 1.20 14 june 28, 2011 ! " @ ! % ( ! ! " @ ! # ! " ! ( ! $ ! $ / ! % " ! % ( ! " ! ( ! . ! # ! " @ ! $ % ! ! " @ ! ( ) ! " ! ( ! $ ! $ ( ! $ $ ! $ % ! " ! ( ! ( & ! ( ) high power led application (row & com with transistor buffer) 32 row 8 com example note: values of the r resistors are selected depending on the power consumption of the leds. 24 row 16 com example note: values of the r resistors are selected depending on the power consumption of the leds. HT1632C rev. 1.20 15 june 28, 2011 ! " @ ! # ! ! " @ ! % ( ! " ! ( ! $ ! " ! ( ! % " ! % ( ! % ! & ! ) ! . ! # ! " @ ! ( ) ! ! " @ ! $ % ! " ! ( ! $ ! ( % ! ( & ! ( ) ! " ! ( ! $ $ ! $ % cascade function 32 row 8 com example (direct drive) note: 1. it also can set cascade mode by software. user must set the master in master mode and slaves in slave mode with command. the cs pin must be connected to mcu individually for independent read and write. 2. values of the r resistors are selected depending on the power consumption of the leds. HT1632C rev. 1.20 16 june 28, 2011 ! ! ! ( $ % , - , - , - ! " @ ! % ( % $ ! ! " @ ! # * ! ! " ! % ( ! " ! # ! " @ ! % ( % $ ! ! " @ ! # * ! ! " ! % ( ! " ! # ! " @ ! % ( % $ ! ! " @ ! # * ! ! " ! % ( ! " ! # 32 row 8 com example (com with transistor buffer) note: 1. it also can set cascade mode by software. user must set the master in master mode and slaves in slave mode with command. the cs pin must be connected to mcu individually for independent read and write. 2. values of the r resistors are selected depending on the power consumption of the leds. HT1632C rev. 1.20 17 june 28, 2011 ! " @ ! # ! ! " @ ! % ( ! " ! # ! " ! % ( ! ! " @ ! % ( ! " ! % ( ! ! " @ ! % ( ! " ! % ( ( $ % , - , - , - % $ ! % $ ! % $ ! * ! 24 row 16 com example (direct drive) note: 1. it also can set cascade mode by software. user must set the master in master mode and slaves in slave mode with command. the cs pin must be connected to mcu individually for independent read and write. 2. values of the r resistors are selected depending on the power consumption of the leds. HT1632C rev. 1.20 18 june 28, 2011 ! ! ! ( $ % , - , - , - $ & ! ( . ! ! " ! $ % ! " ! ( ) $ & ! ( . ! ! " ! $ % ! " ! ( ) $ & ! ( . ! ! " ! $ % ! " ! ( ) ! " @ ! $ % ! " @ ! ( ) ! " @ ! $ % ! " @ ! ( ) ! " @ ! $ % ! " @ ! ( ) 24 row 16 com example (com with transistor buffer) note: 1. it also can set cascade mode by software. user must set the master in master mode and slaves in slave mode with command. the cs pin must be connected to mcu individually for independent read and write. 2. values of the r resistors are selected depending on the power consumption of the leds. HT1632C rev. 1.20 19 june 28, 2011 ! " @ ! ( ) ! ! " @ ! $ % ! " ! ( ) ! " ! $ % ! ! " @ ! $ % ! " ! $ % ! ! " @ ! $ % ! " ! $ % ( $ % , - , - , - $ & ! $ & ! $ & ! ( . ! cascade control flow HT1632C rev. 1.20 20 june 28, 2011 a , b = 1 > ! ! = 1 > = > = > , ! - = 1 > ! - = 1 > = 1 > c = 1 > command summary name id command code d/c function default read 110 a6a5a4a3a2a1a0d0d1d2d3 d read data from the ram write 101 a6a5a4a3a2a1a0d0d1d2d3 d write data to the ram read-modify- write 101 a6a5a4a3a2a1a0d0d1d2d3 d read and write data to the ram sys dis 100 0000-0000-x c turn off both system oscillator and led duty cycle generator yes sys en 100 0000-0001-x c turn on system oscillator led off 100 0000-0010-x c turn off led duty cycle generator yes led on 100 0000-0011-x c turn on led duty cycle generator blink off 100 0000-1000-x c turn off blinking function yes blink on 100 0000-1001-x c turn on blinking function slave mode 100 0001-0xxx-x c set slave mode and clock source from external clock, the system clock input from osc pin and synchronous signal input from syn pin rc master mode 100 0001-10xx-x c set master mode and clock source from on-chip rc os - cillator, the system clock output to osc pin and synchro - nous signal output to syn pin yes ext clk master mode 100 0001-11xx-x c set master mode and clock source from external clock, the system clock input from osc pin and synchronous signal output to syn pin com option 100 0010-abxx-x c ab=00: n-mos open drain output and 8 com option ab=01: n-mos open drain output and 16 com option ab=10: p-mos open drain output and 8 com option ab=11: p-mos open drain output and 16 com option ab =00 pwm duty 100 101x-0000-x c pwm 1/16 duty 100 101x-0001-x c pwm 2/16 duty 100 101x-0010-x c pwm 3/16 duty 100 101x-0011-x c pwm 4/16 duty 100 101x-0100-x c pwm 5/16 duty 100 101x-0101-x c pwm 6/16 duty 100 101x-0110-x c pwm 7/16 duty 100 101x-0111-x c pwm 8/16 duty 100 101x-1000-x c pwm 9/16 duty 100 101x-1001-x c pwm 10/16 duty 100 101x-1010-x c pwm 11/16 duty 100 101x-1011-x c pwm 12/16 duty 100 101x-1100-x c pwm 13/16 duty 100 101x-1101-x c pwm 14/16 duty 100 101x-1110-x c pwm 15/16 duty 100 101x-1111-x c pwm 16/16 duty yes HT1632C rev. 1.20 21 june 28, 2011 note: x: don t care a6~a0: ram addresses d3~d0: ram data d/c: data/command mode default: power on reset default all the bold forms, namel y110,101,and100,are mode commands. among these ,100 indicates the com - mand mode id. if successive commands have been issued, the command mode id except for the first com - mand will be omitted. the source of the tone frequency and of the time base clock frequency can be derived from an on-chip rc oscillator or an external clock. calculation of the frequency is based on the system fre - quency sources as stated above. it is recommended that the host controller should initialize the HT1632C after power on reset, for power on reset may fail, which in turn leads to the malfunction of the HT1632C HT1632C rev. 1.20 22 june 28, 2011 package information 52-pin qfp (14mm 14mm) outline dimensions symbol dimensions in inch min. nom. max. a 0.681 0.689 b 0.547 0.555 c 0.681 0.689 d 0.547 0.555 e 0.039 f 0.016 g 0.098 0.122 h 0.134 i 0.004 j 0.029 0.041 k 0.004 0.008 07 symbol dimensions in mm min. nom. max. a 17.30 17.50 b 13.90 14.10 c 17.30 17.50 d 13.90 14.10 e 1.00 f 0.40 g 2.50 3.10 h 3.40 i 0.10 j 0.73 1.03 k 0.10 0.20 07 HT1632C rev. 1.20 23 june 28, 2011 % / & " ) $ ( $ # ( % < ( & $ . 6 9 b d 4 HT1632C rev. 1.20 24 june 28, 2011 holtek semiconductor inc. (headquarters) no.3, creation rd. ii, science park, hsinchu, taiwan tel: 886-3-563-1999 fax: 886-3-563-1189 http://www.holtek.com.tw holtek semiconductor inc. (taipei sales office) 4f-2, no. 3-2, yuanqu st., nankang software park, taipei 115, taiwan tel: 886-2-2655-7070 fax: 886-2-2655-7373 fax: 886-2-2655-7383 (international sales hotline) holtek semiconductor inc. (shenzhen sales office) 5f, unit a, productivity building, no.5 gaoxin m 2nd road, nanshan district, shenzhen, china 518057 tel: 86-755-8616-9908, 86-755-8616-9308 fax: 86-755-8616-9722 holtek semiconductor (usa), inc. (north america sales office) 46729 fremont blvd., fremont, ca 94538 tel: 1-510-252-9880 fax: 1-510-252-9885 http://www.holtek.com copyright 2011 by holtek semiconductor inc. the information appearing in this data sheet is believed to be accurate at the time of publication. however, holtek as - sumes no responsibility arising from the use of the specifications described. the applications mentioned herein are used solely for the purpose of illustration and holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. holtek s products are not authorized for use as critical components in life support devices or systems. holtek reserves the right to alter its products without prior notification. for the most up-to-date information, please visit our web site at http://www.holtek.com.tw. |
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